An internally mounted printed circuit board called the dual arbiter arbitrates traffic on each internal high-speed system bus (called a CyBus) and generates the CyBus clock. The dual arbiter is attached directly to the front (noninterface processor side) of the system backplane. It controls traffic across each CyBus by prioritizing access requests from interface processors. The dual arbiter ensures that each request is processed and prevents any interface processor from jeopardizing each CyBus and interfering with the ability of the other interface processors to access the Route Switch Processor (RSP).